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[Other] buffervhdl

Description: 电子EDA,VHDL语言设计8位的fifo数据缓冲器的vhdl源程序-E-EDA, VHDL language design 8-bit data buffer fifo VHDL source code
Platform: | Size: 1024 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] 88fifovhdl

Description: 88位进出缓冲器8*8位的fifo数据缓冲器的vhdl源程序 编了个8*8位的fifo数据缓冲器的vhdl源程序，是经过quartusII4.2编译成功的程序。。希望能跟各位交流-88 out of 8* 8-bit buffer fifo data buffer vhdl source Bianle Ge 8* 8-bit data buffer fifo vhdl source code is compiled through quartusII4.2 successful program. . Hope you share Nenggen
Platform: | Size: 2048 | Author: zhaorongjian | Hits:

[VHDL-FPGA-Verilog] SLAVE-FIFO-8BITS

Description: EZUSB FX2 的 SLAVE FIFO例程，包含8051的Firmware以及FPGA的FIFO控制代码 -EZUSB FX2 SLAVE FIFO sample program, including the 8051 firmware, and 8-bit VHDL slave FIFO interface code for FPGA
Platform: | Size: 1676288 | Author: Eddie | Hits:

[VHDL-FPGA-Verilog] VHDL-8bitFIFO

Description: FIFO的宽度：也就是英文资料里常看到的THE WIDTH，它只的是FIFO一次读写操作的数据位，就像MCU有8位和16位，ARM 32位等等，本程序实现8位的FIFO功能,三位格雷码可表示8位的深度。-THE WIDTH of THE FIFO: namely information in English often see THE WIDTH, it is only a FIFO data read and write operations, as has 8 bit or 16 bit MCU, ARM 32-bit, etc., THE program achieve THE function of eight FIFO, three gray code can be expressed THE depth of THE eight.
Platform: | Size: 1024 | Author: 刘伟 | Hits:

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